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1 lt1795 1795fa the lt 1795 is a dual current feedback amplifier with high output current and excellent large signal characteristics.the combination of high slew rate, 500ma output drive and up to 15v operation enables the device to deliver significant power at frequencies in the 1mhz to 2mhzrange. short-circuit protection and thermal shutdown insure the device? ruggedness. the lt1795 is stable with large capacitive loads and can easily supply the large currents required by the capacitive loading. a shutdown feature switches the device into a high impedance, low current mode, reducing power dissipation when the de- vice is not in use. for lower bandwidth applications, the supply current can be reduced with a single external resistor. the lt1795 comes in the very small, thermally enhanced, 20-lead tssop package for maximum port density in line driver applications. typical applicatio n u applicatio s u descriptio u features dual 500ma/50mhz current feedback line driver amplifier adsl hdsl2, g.lite drivers buffers test equipment amplifiers video amplifiers cable drivers , ltc and lt are registered trademarks of linear technology corporation. 500ma output drive current 50mhz bandwidth, a v = 2, r l = 25 900v/ s slew rate, a v = 2, r l = 25 low distortion: ?5dbc at 1mhz high input impedance, 10m wide supply range, 5v to 15v full rate, downstream adsl supported low power shutdown mode power saving adjustable supply current stable with c l = 10,000pf power enhanced small footprint packagestssop-20, s0-20 wide available in a 20-lead tssop package 1795 ta01 + 1/2 lt1795 ?n + 1/2 lt1795 +in v + v 12.5 1:2* 165 1k 1k 12.5 100 * midcom 50215 or equivalent low loss, high power central office adsl line driver downloaded from: http:///
2 lt1795 1795fa supply voltage ...................................................... 18v input current ...................................................... 15ma output short-circuit duration (note 2) ............ indefinite operating temperature range ................ 40 c to 85 c order part number t jmax = 150 c, ja 40 c/w (note 4) absolute axi u rati gs w ww u the denotes the specifications which apply over the full specified temperature range, otherwise specifications are at t a = 25 c. v cm = 0v, 5v v s 15v, pulse tested, v shdn = 2.5v, v shdnref = 0v unless otherwise noted. (note 3) symbol parameter conditions min typ max units v os input offset voltage 3 13 mv 4.5 17 mv input offset voltage matching 1 3.5 mv 1.5 5.0 mv input offset voltage drift 10 v/ c i in + noninverting input current 2 5 a 8 20 a noninverting input current matching 0.5 2 a 1.5 7 a i in inverting input current 10 70 a 20 100 a inverting input current matching 10 30 a 20 50 a e n input noise voltage density f = 10khz, r f =1k, r g = 10 , r s = 0 3.6 nv/ hz +i n input noise current density f = 10khz, r f =1k, r g = 10 , r s = 10k 2 pa/ hz ? n input noise current density f = 10khz, r f =1k, r g = 10 , r s = 10k 30 pa/ hz electrical characteristics (note 1) specified temperature range (note 3) ... 40 c to 85 c junction temperature ........................................... 150 c storage temperature range ................. 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c package/order i for atio uu w order part number lt1795cfelt1795ife 12 3 4 5 6 7 8 9 10 top view s package 20-lead plastic sw 2019 18 17 16 15 14 13 12 11 comp v + out v v v v ?n +in shdn compv + outv v v v ?n +in shdnref t jmax = 150 c, ja = 40 c/w (note 4) lt1795cswlt1795isw 12 3 4 5 6 7 8 9 10 top view 2019 18 17 16 15 14 13 12 11 v nc ?n +in shdn shdnref +in ?n nc v v ncout v + compcomp v + outnc v fe package 20-lead plastic tssop consult ltc marketing for parts specified with wider operating temperature ranges. underside metal internally connected to v (pcb connection optional) downloaded from: http:///
3 lt1795 1795fa symbol parameter conditions min typ max units r in + input resistance v in = 12v, v s = 15v 1.5 10 m v = 2v, v s = 5v 0.5 5 m c in + input capacitance v in = 15v 2 pf input voltage range (note 5) v s = 15v 12 13.5 v v s = 5v 2 3.5 v cmrr common mode rejection ratio v s = 15v, v cm = 12v 55 62 db v s = 5v, v cm = 2v 50 60 db inverting input current v s = 15v, v cm = 12v 11 0 a/v common mode rejection v s = 5v, v cm = 2v 11 0 a/v psrr power supply rejection ratio v s = 5v to 15v 60 77 db noninverting input current v s = 5v to 15v 30 500 na/v power supply rejection inverting input current v s = 5v to 15v 15 a/v power supply rejection a v large-signal voltage gain v s = 15v, v out = 10v, r l = 25 55 68 db v s = 5v, v out = 2v, r l = 12 55 68 db r ol transresistance, ? v out / ? i in v s = 15v, v out = 10v, r l = 25 75 200 k v s = 5v, v out = 2v, r l = 12 75 200 k v out maximum output voltage swing v s = 15v, r l = 25 ? 11.5 12.5 v 10.0 11.5 v v s = 5v, r l = 12 ? 2.5 3v 2.0 3v i out maximum output current v s = 15v, r l = 1 0.5 1 a i s supply current per amplifier v s = 15v, v shdn = 2.5v 29 34 ma 42 ma supply current per amplifier, v s = 15v 15 20 ma r shdn = 51k, (note 6) 25 ma positive supply current, shutdown v s = 15v, v shdn = 0.4v 1 200 a output leakage current, shutdown v s = 15v, v shdn = 0.4v 1 200 a channel separation v s = 15v, v out = 10v, r l = 25 80 110 db hd 2 , hd 3 2nd and 3rd harmonic distortion f = 1mhz, v o = 20v p-p , r l = 50, a v = 2 ?5 dbc differential mode sr slew rate (note 7) a v = 4, r l = 400 400 900 v/ s slew rate a v = 4, r l = 25 900 v/ s bw small-signal bw a v = 2, v s = 15v, peaking 1.5db 65 mhz r f = r g = 910 , r l = 100 a v = 2, v s = 15v, peaking 1.5db 50 mhz r f = r g = 820 , r l = 25 the denotes the specifications which apply over the full specified temperature range, otherwise specifications are at t a = 25 c. v cm = 0v, 5v v s 15v, pulse tested, v shdn = 2.5v, v shdnref = 0v unless otherwise noted. (note 3) electrical characteristics note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired.note 2: applies to short-circuits to ground only. a short-circuit between the output and either supply may permanently damage the part whenoperated on supplies greater than 10v. note 3: the lt1795c is guaranteed to meet specified performance from 0 c to 70 c and is designed, characterized and expected to meet these extended temperature limits, but is not tested at 40 c and 85 c. the lt1795i is guaranteed to meet the extended temperature limits. note 4: thermal resistance varies depending upon the amount of pc board metal attached to the device. if the maximum dissipation of the package isexceeded, the device will go into thermal shutdown and be protected. note 5: guaranteed by the cmrr tests. note 6: r shdn is connected between the shdn pin and v + . note 7: slew rate is measured at 5v on a 10v output signal while operating on 15v supplies with r f = 1k, r g = 333 (a v = +4) and r l = 400 . downloaded from: http:///
4 lt1795 1795fa typical perfor a ce characteristics uw shdn pin current vs voltage temperature ( c) ?0 4035 30 25 20 15 10 50 25 75 lt 1795 g01 ?5 0 50 100 125 supply current per amplifier (ma) r sd = 0 r sd = 51k v s = 15v a v = 1 r l = temperature ( c) ?0 output saturation voltage (v) v + ?? ? ? 43 2 1 v 0 50 75 lt1795 g02 ?5 25 100 125 v s = 15v r l = 2k r l = 25 r l = 25 r l = 2k temperature ( c) ?0 2.01.8 1.6 1.4 1.2 1.0 0.8 0.6 25 75 lt 1795 g03 ?5 0 50 100 125 output short-circuit current (a) sinking sourcing v s = 15v supply current vs ambienttemperature voltage applied at shdn pin (v) 0 1 2 3 4 5 current into shdn pin (ma) 1795 g04 0.60.5 0.4 0.3 0.2 0.1 0 v s = 15v v shdnref = 0v output saturation voltage vsjunction temperature output short-circuit current vsjunction temperature frequency (hz) 10k ?0?0 ?0 ?0 ?0 ?0 ?00 100k 1m lt1795 g05 i q = 5ma i q = 10ma i q = 15ma i q = 20ma a v = 2 differential v out = 20v p-p v s = 15v r load = 50 i q per amplifier distortion (dbc) frequency (hz) distortion (dbc) 10k ?0?0 ?0 ?0 ?0 ?0 ?00 100k 1m lt1795 g06 i q = 10ma i q = 15ma i q = 20ma a v = 2 differential v out = 20v p-p v s = 15v r load = 50 i q per amplifier i q = 5ma second harmonic distortion vsfrequency third harmonic distortion vsfrequency s m all-sig n al ba n dwidth u u w ?db bw a v r f r g (mhz) ? 976 976 30 1 1.15k 32 2 976 976 32 10 649 72 27 r sd = 0 , i s = 30ma per amplifer, v s = 15v, peaking 1db, r l = 25 ?db bw a v r f r g (mhz) ? 976 976 44 1 1.15k 53 2 976 976 48 10 649 72 46 r sd = 51k , i s = 15ma per amplifer, v s = 15v, peaking 1db, r l = 25 downloaded from: http:///
5 lt1795 1795fa typical perfor a ce characteristics uw frequency (hz) 10k ?0?0 ?0 ?0 ?0 ?0 ?00 100k 1m lt1795 g11 i q = 5ma a v = 10 differential v out = 20v p-p v s = 12v r load = 50 i q per amplifier distortion (dbc) i q = 20ma i q = 10ma i q = 15ma frequency (hz) 10k ?0?0 ?0 ?0 ?0 ?0 ?00 100k 1m lt1795 g12 i q = 5ma i q = 10ma i q = 15ma a v = 10 differential v out = 20v p-p v s = 12v r load = 50 i q per amplifier distortion (dbc) i q = 20ma frequency (hz) 10k ?0?0 ?0 ?0 ?0 ?0 ?00 100k 1m lt1795 g10 i q = 5ma i q = 10ma i q = 15ma a v = 2 differential v out = 20v p-p v s = 12v r load = 50 i q per amplifier distortion (dbc) i q = 20ma third harmonic distortion vsfrequency third harmonic distortion vsfrequency second harmonic distortion vsfrequency third harmonic distortion vsfrequency second harmonic distortion vsfrequency second harmonic distortion vsfrequency frequency (hz) 10k ?0?0 ?0 ?0 ?0 ?0 ?00 100k 1m lt1795 g13 a v = 2 differential v out = 4v p-p v s = 12v r load = 50 i q per amplifier distortion (dbc) i q = 5ma i q = 20ma i q = 15ma i q = 10ma frequency (hz) 10k ?0?0 ?0 ?0 ?0 ?0 ?00 100k 1m lt1795 g14 a v = 2 differential v out = 4v p-p v s = 12v r load = 50 i q per amplifier distortion (dbc) i q = 5ma i q = 10ma i q = 15ma i q = 20ma frequency (hz) 10k ?0?0 ?0 ?0 ?0 ?0 ?00 100k 1m lt1795 g15 a v = 10 differential v out = 4v p-p v s = 12v r load = 50 i q per amplifier distortion (dbc) i q = 5ma i q = 10ma i q = 20ma i q = 15ma second harmonic distortion vsfrequency frequency (hz) 10k ?0?0 ?0 ?0 ?0 ?0 ?00 100k 1m lt1795 g07 i q = 5ma i q = 15ma a v = 10 differential v out = 20v p-p v s = 15v r load = 50 i q per amplifier distortion (dbc) i q = 20ma i q = 10ma third harmonic distortion vsfrequency second harmonic distortion vsfrequency frequency (hz) distortion (dbc) 10k ?0?0 ?0 ?0 ?0 ?0 ?00 100k 1m lt1795 g08 i q = 5ma i q = 10ma i q = 20ma a v = 10 differential v out = 20v p-p v s = 15v r load = 50 i q per amplifier i q = 15ma frequency (hz) 10k ?0?0 ?0 ?0 ?0 ?0 ?00 100k 1m lt1795 g09 i q = 5ma i q = 15ma i q = 20ma a v = 2 differential v out = 20v p-p v s = 12v r load = 50 i q per amplifier distortion (dbc) i q = 10ma downloaded from: http:///
6 lt1795 1795fa typical perfor a ce characteristics uw third harmonic distortion vsfrequency second harmonic distortion vsfrequency frequency (hz) 10k ?0?0 ?0 ?0 ?0 ?0 ?00 100k 1m lt1795 g19 a v = 10 differential v out = 4v p-p v s = 5v r load = 50 i q per amplifier distortion (dbc) i q = 5ma i q = 10ma i q = 15ma i q = 20ma frequency (hz) 10k ?0?0 ?0 ?0 ?0 ?0 ?00 100k 1m lt1795 g20 a v = 10 differential v out = 4v p-p v s = 5v r load = 50 i q per amplifier distortion (dbc) i q = 5ma i q = 10ma i q = 15ma i q = 20ma third harmonic distortion vsfrequency second harmonic distortion vsfrequency third harmonic distortion vsfrequency frequency (hz) 10k ?0?0 ?0 ?0 ?0 ?0 ?00?10 100k 1m lt1795 g16 distortion (dbc) a v = 10 differential v out = 4v p-p v s = 12v r load = 50 i q per amplifier i q = 5ma i q = 20ma i q = 10ma i q = 15ma frequency (hz) 10k ?0?0 ?0 ?0 ?0 ?0 ?00 100k 1m lt1795 g17 a v = 2 differential v out = 4v p-p v s = 5v r load = 50 i q per amplifier distortion (dbc) i q = 5ma i q = 10ma i q = 15ma i q = 20ma frequency (hz) 10k ?0?0 ?0 ?0 ?0 ?0 ?00 100k 1m lt1795 g18 a v = 2 differential v out = 4v p-p v s = 5v r load = 50 i q per amplifier distortion (dbc) i q = 5ma i q = 10ma i q = 15ma i q = 20ma supply current per amplifier (ma) 7.5 slew rate (v/ s) 20 30 1795 ? g21 10 15 25 12001000 800600 400 200 0 rising falling v s = 15v t a =25 c a v = 4 r load = 25 r f = 1k ?db bandwidth vssupply current supply current per amplifier (ma) 7.5 25 ?db bandwidth (mhz) 30 40 45 50 20 30 1795 ? g22 35 10 15 25 v s = 15v t a =25 c a v = 4 r load = 25 r f = 1k slew rate vs supply current downloaded from: http:///
7 lt1795 1795fa applicatio s i for atio wu u u the lt1795 is a dual current feedback amplifier with highoutput current drive capability. the amplifier is designed to drive low impedance loads such as twisted-pair trans- mission lines with excellent linearity. shutdown/current set if the shutdown/current set feature is not used, connect shdn to v + and shdnref to ground. the shdn and shdnref pins control the biasing of thetwo amplifiers. the pins can be used to either turn off the amplifiers completely, reducing the quiescent current to less then 200 a, or to control the quiescent current in normal operation. when v shdn = v shdnref , the device is shut down. the device will interface directly with 3v or 5v cmos logicwhen shdnref is grounded and the control signal is applied to the shdn pin. switching time between the active and shutdown states is about 1.5 s. figures 1 to 4 illustrate how the shdn and shdnref pinscan be used to reduce the amplifier quiescent current. in both cases, an external resistor is used to set the current. the two approaches are equivalent, however the required resistor values are different. the quiescent current will be approximately 115 times the current in the shdn pin and 230 times the current in the shdnref pin. the voltage across the resistor in either condition is v + ?1.5v. for example, a 50k resistor between v + and shdn will set the figure 1. r shdn connected between v + and shdn (pin 10); shdnref (pin 11) = gnd. see figure 2 figure 2. lt1795 amplifier supply current vs r shdn . r shdn connected between v + and shdn, shdnref = gnd (see figure 1) 10 shdn r shdn v + 11 shdnref 1795 f01 r shdn (k ) 0 25 50 75 100 125 150 175 200 225 amplifier supply current, i sy ?ma (both amplifiers) 1795 f02 8070 60 50 40 30 20 10 0 t a = 25 c v s = 15v figure 4. lt1795 amplifier supply current vs r shdnref . r shdnref connected between shdnref and gnd, shdn = v + (see figure 3) r shdnref (k ) 50 100 150 200 250 300 350 400 450 500 amplifier supply current, i sy ?ma (both amplifiers) 1795 f04 8070 60 50 40 30 20 10 0 t a = 25 c v s = 15v figure 3. r shdnref connected between shdnref (pin 11) and gnd; shdn (pin 10) = v + . see figure 4 10 shdn v + 11 shdnref 1795 f03 r shdnref downloaded from: http:///
8 lt1795 1795fa applicatio s i for atio wu u u figure 5. setting amplifier supply currentlevel with on/off control, version 1 figure 6. setting multiple amplifier supplycurrent levels with on/off control, version 2 10 shdn internallogic threshold ~1.4v r shdn v + 11 shdnref 1795 f05 r b 10k q1 off (0v) on (3.3v/5v) q1: 2n3904 or equivalent 10 shdn r pullup >500k r shdn2 v + 11 shdnref 1795 f06 r b2 10k q1b on off r b1 10k q1a on off q1a, q1b: rohm imx1 or fmg4a (w/internal r b ) r shdn1 (3.3v/5v) (3.3v/5v) (0v) (0v) figure 7. setting amplifier supply current levelwith on/off control, version 3 10 shdn r ext 11 shdnref 1795 f07 on off i sy control internallogic threshold ~ 1.4v i prog ? 0.5ma for r ext = 0 (see shdn pin current vs voltage characteristic) (3.3v/5v) (0v) i prog figure 8. partial shutdown 10 shdn r1 r2 11 shdnref 1795 f08 on off i sy control internallogic threshold ~ 1.4v (3.3v/5v) (0v) v cc figure 8 illustrates a partial shutdown with direct logiccontrol. by keeping the output stage slightly biased on, the output impedance remains low, preserving the line termi- nation. the design equations are: r v ii r vv vvi i i h s on s off cc shdn shdn h s on s off s off 1 115 2 115 = () () = () ( ) () () ?? ? ?? ? + () ? C ? /? C where v h = logic high level (i s ) on = supply current fully on (i s ) off = supply current partially on v shdn = shutdown pin voltage 1.4v v cc = positive supply voltage thermal considerationsthe lt1795 contains a thermal shutdown feature that protects against excessive internal (junction) temperature. if the junction temperature of the device exceeds the protection threshold, the device will begin cycling between normal operation and an off state. the cycling is not harmful to the part. the thermal cycling occurs at a slow rate, typically 10ms to several seconds, which depends on the power dissipation and the thermal time constants of the package and heat sinking. raising the ambient tempera- quiescent current to 33ma with v s = 15v. if on/off control is desired in addition to reduced quiescent current,then the circuits in figures 5 to 7 can be employed. downloaded from: http:///
9 lt1795 1795fa applicatio s i for atio wu u u ture until the device begins thermal shutdown gives agood indication of how much margin there is in the thermal design. for surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the pc board and its copper traces. for the tssop package, power is dissipated through the exposed heatsink. for the so package, power is dissipated from the package primarily through the v pins (4 to 7 and 14 to 17). these pins should have a good thermal connection to a copper plane,either by direct contact or by plated through holes. the copper plane may be an internal or external layer. the thermal resistance, junction-to-ambient will depend on the total copper area connected to the device. for example, the thermal resistance of the lt1795 connected to a 2 2 inch, double sided 2 oz copper plane is 40 c/w. calculating junction temperaturethe junction temperature can be calculated from the equation: t j = (p d )( ja ) + t a where t j = junction temperature t a = ambient temperature p d = device dissipation ja = thermal resistance (junction-to-ambient) differential input signal swingthe differential input swing is limited to about 5v by an esd protection device connected between the inputs. innormal operation, the differential voltage between the input pins is small, so this clamp has no effect. however, in the shutdown mode, the differential swing can be the same as the input swing. the clamp voltage will then set the maximum allowable input voltage. power supply bypassing to obtain the maximum output and the minimum distor- tion from the lt1795, the power supply rails should be well bypassed. for example, with the output stage supply- ing 0.5a current peaks into the load, a 1 power supply impedance will cause a droop of 0.5v, reducing theavailable output swing by that amount. surface mount tantalum and ceramic capacitors make excellent low esr bypass elements when placed close to the chip. for frequencies above 100khz, use 1 f and 100nf ceramic capacitors. if significant power must be delivered below100khz, capacitive reactance becomes the limiting factor. larger ceramic or tantalum capacitors, such as 4.7 f, are recommended in place of the 1 f unit mentioned above. inadequate bypassing is evidenced by reduced outputswing and ?istorted?clipping effects when the output is driven to the rails. if this is observed, check the supply pins of the device for ripple directly related to the output waveform. significant supply modulation indicates poor bypassing. capacitance on the inverting input current feedback amplifiers require resistive feedback from the output to the inverting input for stable operation. take care to minimize the stray capacitance between the output and the inverting input. capacitance on the invert- ing input to ground will cause peaking in the frequency response (and overshoot in the transient response), but it does not degrade the stability of the amplifier. feedback resistor selection the optimum value for the feedback resistors is a function of the operating conditions of the device, the load imped- ance and the desired flatness of response. the typical ac performance tables give the values which result in less than 1db of peaking for various resistive loads and oper- ating conditions. if this level of flatness is not required, a higher bandwidth can be obtained by use of a lower feedback resistor. for resistive loads, the comp pin should be left open (see capacitive loads section). capacitive loads the lt1795 includes an optional compensation network for driving capacitive loads. this network eliminates most of the output stage peaking associated with capacitive loads, allowing the frequency response to be flattened. downloaded from: http:///
10 lt1795 1795fa sw package 20-lead plastic small outline (wide .300 inch) (reference ltc dwg # 05-08-1620) figure 9 shows the effect of the network on a 200pf load.without the optional compensation, there is a 6db peak at 85mhz caused by the effect of the capacitance on the output stage. adding a 0.01 f bypass capacitor between the output and the comp pins connects the compensation applicatio n s i n for m atio n wu u u figure 9 frequency (mhz) 1 voltage gain (db) 1412 10 86 4 2 0 ?? ? 10 100 1795 f09 v s = 15v c l = 200pf r f = 3.4k no compensation r f = 1k compensation r f = 3.4k compensation package descriptio u and greatly reduces the peaking. a lower value feedbackresistor can now be used, resulting in a response which is flat to 1db to 45mhz. the network has the greatest effect for c l in the range of 0pf to 1000pf. although the optional compensation works well withcapacitive loads, it simply reduces the bandwidth when it is connected with resistive loads. for instance, with a 25 load, the bandwidth drops from 48mhz to 32mhz whenthe compensation is connected. hence, the compensation was made optional. to disconnect the optional compensa- tion, leave the comp pin open. demo board a demo board (dc261a) is available for evaluating the performence of the lt1795. the board is configured as a differential line driver/receiver suitable for xdsl applica- tions. for details, consult your local sales representative. s20 (wide) 0502 note 3 .496 ?.512 (12.598 ?13.005) note 4 20 n 19 18 17 16 15 14 13 1 23 4 5 6 78 .394 ?.419 (10.007 ?10.643) 910 n/2 11 12 .037 ?.045 (0.940 ?1.143) .004 ?.012 (0.102 ?0.305) .093 ?.104 (2.362 ?2.642) .050 (1.270) bsc .014 ?.019 (0.356 ?0.482) typ 0 ?8 typ note 3 .009 ?.013 (0.229 ?0.330) .016 ?.050 (0.406 ?1.270) .291 ?.299 (7.391 ?7.595) note 4 45 .010 ?.029 (0.254 ?0.737) .420 min .325 .005 recommended solder pad layout .045 .005 n 1 2 3 n/2 .050 bsc .030 .005 typ .005 (0.127) rad min inches (millimeters) note:1. dimensions in 2. drawing not to scale 3. pin 1 ident, notch on top and cavities on the bottom of packages are the manufacturing options. the part may be supplied with or without any of the options 4. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) downloaded from: http:///
11 lt1795 1795fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. package descriptio u fe package 20-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1663) exposed pad variation ca fe20 (ca) tssop 0203 0.09 ?0.20 (.0036 ?.0079) 0 ?8 recommended solder pad layout 0.45 ?0.75 (.018 ?.030) 4.30 ?4.50* (.169 ?.177) 6.40 bsc 134 5 6 7 8910 11 12 14 13 6.40 ?6.60* (.252 ?.260) 4.95 (.195) 2.74 (.108) 20 1918 17 16 15 1.20 (.047) max 0.05 ?0.15 (.002 ?.006) 0.65 (.0256) bsc 0.195 ?0.30 (.0077 ?.0118) 2 2.74 (.108) 0.45 0.05 0.65 bsc 4.50 0.10 6.60 0.10 1.05 0.10 4.95 (.195) millimeters (inches) *dimensions do not include mold flash. mold flash shall not exceed 0.150mm (.006") per side note:1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale see note 4 4. recommended minimum pcb metal size for exposed pad attachment downloaded from: http:///
12 lt1795 1795fa part number description comments lt1497 dual 125ma, 50mhz current feedback amplifier 900v/ s slew rate lt1207 dual 250ma, 60mhz current feedback amplifier shutdown/current set function lt1886 dual 200ma, 700mhz voltage feedback amplifier low distortion: ?2dbc at 200khz linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 1999 lt/tp 0603 1k reva ? printed in usa related parts sche m atic w w si plified 1795 ss v output v + 50 d2 d1 v v + v + v c c r c comp ?n +in shdn shdnref to all currentsources q11 q15 q9 q6 q5 q2 q1 q3 q4 q7 q8 q12 q16 q14 q13 q10 downloaded from: http:///

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